Side-by-side comparison of AI visibility scores, market position, and capabilities
Thermodynamic computing chips for AI. World's first CN101 chip taped out (Aug 2025). $85M+ raised ($50M from Samsung Mar 2026). 1000x energy efficiency target.
Normal Computing was founded by physicists and engineers who identified a fundamental mismatch between the mathematics of modern AI and the digital hardware used to run it. Neural network inference is inherently probabilistic and statistical, yet it runs on deterministic digital chips that must simulate randomness inefficiently. Normal Computing's founding thesis is that thermodynamic computing — hardware that natively operates according to the laws of statistical physics — can perform AI workloads with orders-of-magnitude better energy efficiency than conventional silicon.\n\nNormal Computing's CN101 is the world's first thermodynamic computing chip, taped out in August 2025. The chip is designed to accelerate sampling-based AI workloads, including inference for large language models, Bayesian reasoning, and generative AI tasks that are computationally expensive on digital hardware. By exploiting thermal noise and stochastic physics rather than fighting them, the CN101 performs these computations using a fraction of the energy of GPU-based alternatives. The company claims a potential 1,000x improvement in energy efficiency for targeted workloads, a figure that, if validated at scale, would have transformative implications for AI infrastructure economics.\n\nNormal Computing has raised over $85 million, including a $50 million strategic investment from Samsung in March 2026. Samsung's involvement signals both financial validation and the potential for integration with Samsung's semiconductor manufacturing and memory ecosystems. The company is positioned at the intersection of AI compute and energy efficiency — two of the most pressing concerns in the technology industry — giving it relevance to hyperscalers, AI hardware vendors, and government initiatives focused on AI energy consumption.
Leading small FPGA and programmable logic supplier; ~$500M revenue. Nexus and Certus families power edge AI, server management, and industrial automation with ultra-low power.
Lattice Semiconductor was founded in 1983 in Hillsboro, Oregon and has established itself as the leading provider of low-power, small-footprint field-programmable gate arrays (FPGAs) and programmable logic devices. Unlike Intel (Altera) and AMD (Xilinx) which target high-performance data center and aerospace FPGAs, Lattice focuses on the power-constrained edge: server management cards, industrial automation controllers, automotive ADAS, communications, and consumer electronics.\n\nLattice's product families—including the Nexus, CertusPro, and MachXO3D platforms—are differentiated by their ultra-low power consumption (often under 1W), small package sizes, and security features. The company has aggressively pivoted toward edge AI inference, launching the sensAI solution stack that enables neural network inference on resource-constrained devices without a GPU. Its Avant FPGA family targets mid-range applications with higher density and DSP capability.\n\nLattice generated approximately $500 million in annual revenue and has seen strong adoption in server OCP (Open Compute Project) platform management controllers and server security applications. The company operates a fabless model, manufacturing at TSMC and GlobalFoundries. Lattice has benefited from the broad push to run AI inference at the network edge and in data center management chips, positioning its ultra-low-power programmable logic as infrastructure for the AI era.
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